The Receiver Interface board is 6U standard VPX based conduction cooled with proper key angle alignment board it accepts the pulse to pulse data (like Frequency, Pulse width, Amplitude, Direction of Arrival, time of Arrival etc.) from Homodyne receivers. The RIB board to convert the received 32bit PDW data into serial format and send to the ESM Processor board for further processing. The design is carried out using Virtex-5FX series of FPGA from Xilinx