Receiver Interface Board

The Receiver Interface board is 6U standard VPX based conduction cooled with proper key angle alignment board it accepts the pulse to pulse data (like Frequency, Pulse width, Amplitude, Direction of Arrival, time of Arrival etc.) from Homodyne receivers. The RIB board to convert the received 32bit PDW data into serial format and send to the ESM Processor board for further processing. The design is carried out using Virtex-5FX series of FPGA from Xilinx

Memory

  • 1Gb DDR2 Memory
  •  256Mb NOR-FLASH Memory

Digital I/O’s

  • More than 500TTL/LVTTL

Communication Ports

  • 10/100/1000 Mbps Ethernet.
  •  3.125Gbps Optical Fiber Links.
  •  RS-422.
  •  RS-232

Specifications  Parameters and Measurements 
Techniques Generate the Serial PDW data
Interfaces SFP, Ethernet, RS232, RS422, Digital I/O’s
Connectorization 6U VPX Edge connector and Micro D
Mechanical HE30 Aluminum Yellow Chromate and ESS qualified
PCB High speed frequency 14 Layer with impedance matched

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